Compiler

http://stackoverflow.com/questions/1669/learning-to-write-a-compiler

ARM Data Abortion

Example handle an data abortion exception
----------------
R14 value is 0x0000021e
0x0000021e - 8 = 0x00000216.
The instruction which caused the exception is at address 0x00000216

Reference
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http://www.keil.com/support/docs/3080.htm

ARM Function Call in Assembly

Quotation:
This calling convention causes a "typical" ARM subroutine to:
- In the prolog, push r4 to r11 to the stack, and push the return address in r14, to the stack. (This can be done with a single STM instruction).
- copy any passed arguments (in r0 to r3) to the local scratch registers (r4 to r11).
- allocate other local variables to the remaining local scratch registers (r4 to r11).
- do calculations and call other subroutines as necessary using BL, assuming r0 to r3, r12 and r14 will not be preserved.
- put the result in r0
- In the epilog, pull r4 to r11 from the stack, and pulls the return address to the program counter r15. (This can be done with a single LDM instruction).


Reference:
http://en.wikipedia.org/wiki/Calling_convention#ARM
http://omappedia.org/wiki/Writing_ARM_Assembly#EABI_Calling_conventions
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf

Interrupt Disable

This post explains clearly what will happen to interrupts that has been disabled.

Quote:

"Often, one interrupt is "queued" by hardware.
[An interrupt is often just a logic gate that can stick on; once it's on, it stays on for a while.]
If the user hit 'a' once only during the interval when interrupts were disabled, it would register as an interrupt when they were re-enabled.
If the user somehow managed to hit 'a' twice during the interval when interrupts were disabled, one would register as an interrupt when they where enabled. Whether it was the first or the second depends on the exact logic gate configuration. "


Reference:
http://stackoverflow.com/questions/3427546/what-is-meant-by-disabling-interrupts

System Call on ARM

Below link explains how system call on ARM is implemented.

Quote:
" In the case of system calls on ARM, normally the system call causes a SWI instruction to be executed. Anytime the processor executes a SWI (software interrupt) instruction, it goes into SVC mode, which is privileged, and jumps to the SWI exception handler. The SWI handler then looks at the cause of the interrupt (embedded in the instruction) and then does whatever the OS programmer decided it should do. The other exceptions - reset, undefined instruction, prefetch abort, data abort, interrupt, and fast interrupt - all also cause the processor to enter privileged modes.How file handling works is entirely up to whoever wrote your operating system - there's nothing ARM specific about that at all. "

About exception handler:
ARM exception handler is usually placed at address 0x0000000 (can be configured).

Reference:
http://stackoverflow.com/questions/8199609/arm-modes-user-and-system http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0211h/Babfeega.html

Arbitration for Shared Resources

In an SoC, 16 arbitration bits are available to allow the two CPUs to arbitrate for shared resources.
The 16 arbitration bits are mapped into CPU register memory spaces.

To request the shared resources, the requesting CPU sets the arbitration bit. It then reads
back to see if the bit is set.

Not like DRAM memory access, this arbitration hardware is surely cannot be interrupted.

Things I Should Know

http://multimedia.cx/eggs/what-every-programmer-should-know/