ATA Operations

Access ATA registers.

PC/AT ports information:
http://stanislavs.org/helppc/ports.html

// Get Taskfile cylinder high register value
#include 
#define kinp(p)      inp(p)
#define ide_cyh0     ((U16)0x01f5) /* cylinder high register */

cyl_high = (U8)kinp(ide_cyh0);

DMA Access

DMA setting up is via BIOS interrupt call:
http://en.wikipedia.org/wiki/BIOS_interrupt_call

__asm {
    mov ax, 0xB10B
    mov bh, Base_B_Number
    mov bl, Base_DF_Number
    mov di, 0x48
    mov cl, hcl
    int 0x1A

Sequence of w/r DMA transfer:
  - Setup PRD table ( http://wiki.osdev.org/ATA/ATAPI_using_DMA ) 
  - Config DMA resigsers
  - Set IDE PRD table address to IDE port
  - Interrupt config
  - Sent out command to ide status/command port
  - Polling status port to wait for the command ends

A Bug of ARM Compiler Error

Log an ARM compiler error.
Be careful bit field in the structure.
Good case, to write a the bit field, read/modify/write operation is done: do 4 bytes ready, update 3 bytes, write 4 bytes back.

 
 // With this structure  
 typedef __packed struct{  
   mUINT_32 nvSecSetIndex : 24;
   mUINT_32 dummy : 16;
 }mtNV_SEC_SET; 
 
 // We get compile result  
 nvSecSetIndex = setIndex;  
 00139a 9001         STR   r0,[sp,#4]  
 00139c f7fffffe     BL    __aeabi_uread4  
 0013a0 f3650017     BFI   r0,r5,#0,#24  
 0013a4 9901         LDR   r1,[sp,#4]  
 0013a6 f7fffffe     BL    __aeabi_uwrite4   

NG case, do 4 bytes write directly. This will overwrites the memory of address ((int)&(p->nvSecSetIndex) + 3). Happens when the structure has only one bit field.

  
 // With this structure  
 typedef __packed struct{  
   mUINT_32 nvSecSetIndex : 24;   
 }mtNV_SEC_SET;  

 // We get compile result  
 nvSecSetIndex = setIndex;  
 00139a 4628         MOV   r0,r5  
 00139c f7fffffe     BL    __aeabi_uwrite4