MLC Page Written Randomly?

Can UBI logical eraseblocks be written randomly?

No, the flash chip restrictions have to be taken into account. This is because UBI logical eraseblocks (LEB) are mapped to physical eraseblocks (PEB), and an LEB write operation is essentially a write to the corresponding PEB plus a small offset. The important flash restrictions are:

all writes have to be aligned to the min. I/O unit size and be multiple of min. I/O unit size;
sometimes it is prohibited to write more then once to the same PEB offset (e.g., in case of NAND flash);
many NAND flashes (specifically, MLC NAND flashes) require NAND pages to be written sequentially from the beginning of the physical eraseblock, to the end of the physical eraseblock; for example, it is prohibited to first write to offset 2048, then to offset 0; once offset 2048 has been written to, it is possible to write only to further offsets.

Even if the flash chip is devoid of the last restriction, UBI anyway requires logical eraseblocks to be written sequentially from the beginning to the end. This is because UBI calculates data CRC when moving logical eraseblocks to other physical eraseblocks (see here for more information), so a write an offset which is less than the furthest written data offset causes CRC errors;


Reference
http://www.linux-mtd.infradead.org/faq/ubi.html