ARM Soc Tracing

How It Work
The external debug software configures the trace and debug components through the DAP. The ROM table contains a unique identification code for the SoC and the base addresses of the components connected to the debug APB. The trace stream from the ETM-R4 is replicated to provide on-chip storage using the CoreSight ETB or output off-chip using the TPIU.

Configuring the Trace Data Output Mode on SoC
After a single ATB trace stream is formed through TF, it goes through the Trace Port Interface Unit (TPIU) to reach the trace data pins, TEST[7:0], and trace clock output pin, TEST[8], while in parallel ETM mode
The TPIU formats the ATB trace stream to generate the formatted data output to the SOC pins, which are connected to TPA.
TPA ( Trace Port Analyser ) is a module in sider in DSTREAM.