Below link explains how system call on ARM is implemented.
Quote:
" In the case of system calls on ARM, normally the system call causes a SWI instruction to be executed. Anytime the processor executes a SWI (software interrupt) instruction, it goes into SVC mode, which is privileged, and jumps to the SWI exception handler. The SWI handler then looks at the cause of the interrupt (embedded in the instruction) and then does whatever the OS programmer decided it should do. The other exceptions - reset, undefined instruction, prefetch abort, data abort, interrupt, and fast interrupt - all also cause the processor to enter privileged modes.How file handling works is entirely up to whoever wrote your operating system - there's nothing ARM specific about that at all. "
About exception handler:
ARM exception handler is usually placed at address 0x0000000 (can be configured).
Reference:
http://stackoverflow.com/questions/8199609/arm-modes-user-and-system
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0211h/Babfeega.html
2013/01/15
2013/01/11
Arbitration for Shared Resources
In an SoC, 16 arbitration bits are available to allow the two CPUs to arbitrate for shared resources.
The 16 arbitration bits are mapped into CPU register memory spaces.
To request the shared resources, the requesting CPU sets the arbitration bit. It then reads
back to see if the bit is set.
Not like DRAM memory access, this arbitration hardware is surely cannot be interrupted.
The 16 arbitration bits are mapped into CPU register memory spaces.
To request the shared resources, the requesting CPU sets the arbitration bit. It then reads
back to see if the bit is set.
Not like DRAM memory access, this arbitration hardware is surely cannot be interrupted.
2013/01/07
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