2013/02/18
2013/02/15
ARM Data Abortion
Example handle an data abortion exception
----------------
R14 value is 0x0000021e
0x0000021e - 8 = 0x00000216.
The instruction which caused the exception is at address 0x00000216
Reference
----------------
http://www.keil.com/support/docs/3080.htm
----------------
R14 value is 0x0000021e
0x0000021e - 8 = 0x00000216.
The instruction which caused the exception is at address 0x00000216
Reference
----------------
http://www.keil.com/support/docs/3080.htm
2013/02/13
ARM Function Call in Assembly
Quotation:
This calling convention causes a "typical" ARM subroutine to:
- In the prolog, push r4 to r11 to the stack, and push the return address in r14, to the stack. (This can be done with a single STM instruction).
- copy any passed arguments (in r0 to r3) to the local scratch registers (r4 to r11).
- allocate other local variables to the remaining local scratch registers (r4 to r11).
- do calculations and call other subroutines as necessary using BL, assuming r0 to r3, r12 and r14 will not be preserved.
- put the result in r0
- In the epilog, pull r4 to r11 from the stack, and pulls the return address to the program counter r15. (This can be done with a single LDM instruction).
Reference:
http://en.wikipedia.org/wiki/Calling_convention#ARM
http://omappedia.org/wiki/Writing_ARM_Assembly#EABI_Calling_conventions
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf
2013/02/05
Interrupt Disable
This post explains clearly what will happen to interrupts that has been disabled.
Quote:
"Often, one interrupt is "queued" by hardware.
[An interrupt is often just a logic gate that can stick on; once it's on, it stays on for a while.]
If the user hit 'a' once only during the interval when interrupts were disabled, it would register as an interrupt when they were re-enabled.
If the user somehow managed to hit 'a' twice during the interval when interrupts were disabled, one would register as an interrupt when they where enabled. Whether it was the first or the second depends on the exact logic gate configuration. "
Reference:
http://stackoverflow.com/questions/3427546/what-is-meant-by-disabling-interrupts
Quote:
"Often, one interrupt is "queued" by hardware.
[An interrupt is often just a logic gate that can stick on; once it's on, it stays on for a while.]
If the user hit 'a' once only during the interval when interrupts were disabled, it would register as an interrupt when they were re-enabled.
If the user somehow managed to hit 'a' twice during the interval when interrupts were disabled, one would register as an interrupt when they where enabled. Whether it was the first or the second depends on the exact logic gate configuration. "
Reference:
http://stackoverflow.com/questions/3427546/what-is-meant-by-disabling-interrupts
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